#include "conf.h"

#include "lolevel.h"
#include "platform.h"
#include "core.h"

int *video_quality = &conf.video_quality;
int *video_mode    = &conf.video_mode;

long def_table[24]={0x2000, 0x38D, 0x788, 0x5800, 0x9C5, 0x14B8, 0x10000, 0x1C6A, 0x3C45, 0x8000, 0xE35, 0x1E23,
           0x1CCD, -0x2E1, -0x579, 0x4F33, -0x7EB, -0xF0C, 0xE666, -0x170A, -0x2BC6, 0x7333, -0xB85, -0x15E3};
long table[24];

void change_video_tables(int a, int b){
 int i;
 for (i=0;i<24;i++) table[i]=(def_table[i]*a)/b; 
}

long CompressionRateTable[]={0x60, 0x5D, 0x5A, 0x57, 0x54, 0x51, 0x4D, 0x48, 0x42, 0x3B, 0x32, 0x29, 0x22, 0x1D, 0x17, 0x14, 0x10, 0xE, 0xB, 9, 7, 6, 5, 4, 3, 2, 1};

void __attribute((naked,noinline)) movie_record_task() {
     asm volatile (
"                 STMFD   SP!, {R2-R8,LR}\n"
"                 LDR     R8, =0x332\n"
"                 LDR     R7, =0x2710\n"
"                 LDR     R4, =0x5048\n"
"                 MOV     R6, #0\n"
"                 MOV     R5, #1\n"
" loc_FFC47BCC:\n"
"                 LDR     R0, [R4,#0x18]\n"
"                 MOV     R2, #0\n"
"                 ADD     R1, SP, #0x20-0x1C\n"
"                 BL      sub_FFC1693C\n"		// _sub_FFC1693C__KerQueue_c__0
"                 LDR     R0, [R4,#0x20]\n"
"                 CMP     R0, #0\n"
"                 BNE     loc_FFC47C9C\n"
"                 LDR     R0, [SP,#0x20-0x1C]\n"
"                 LDR     R1, [R0]\n"
"                 SUB     R1, R1, #2\n"
"                 CMP     R1, #9\n"
"                 ADDLS   PC, PC, R1,LSL#2\n"
"                 B       loc_FFC47C9C\n"
" loc_FFC47C00:\n"
"                 B       loc_FFC47C50\n"
" loc_FFC47C04:\n"
"                 B       loc_FFC47C70\n"
" loc_FFC47C08:\n"
"                 B       loc_FFC47C80\n"
" loc_FFC47C0C:\n"
"                 B       loc_FFC47C88\n"
" loc_FFC47C10:\n"
"                 B       loc_FFC47C58\n"
" loc_FFC47C14:\n"
"                 B       loc_FFC47C90\n"
" loc_FFC47C18:\n"
"                 B       loc_FFC47C60\n"
" loc_FFC47C1C:\n"
"                 B       loc_FFC47C9C\n"
" loc_FFC47C20:\n"
"                 B       loc_FFC47C98\n"
" loc_FFC47C24:\n"
"                 B       loc_FFC47C28\n"
" loc_FFC47C28:\n"
"                 STR     R6, [R4,#0x34]\n"
"                 LDR     R0, =0xFFC478B0\n"		// nullsub_256
"                 LDR     R2, =0xFFC47248\n"
"                 LDR     R1, =0x18938\n"
"                 STR     R0, [R4,#0xA0]\n"
"                 LDR     R0, =0xFFC4732C\n"
"                 STR     R6, [R4,#0x24]\n"
"                 BL      sub_FFCA1A64\n"
"                 STR     R5, [R4,#0x38]\n"
"                 B       loc_FFC47C9C\n"
" loc_FFC47C50:\n"
"                 BL      unlock_optical_zoom\n"  // --> Inserted code
"                 BL      sub_FFC479A8\n"		// _sub_FFC479A8__MovieRecorder_c__964
"                 B       loc_FFC47C9C\n"
" loc_FFC47C58:\n"
"                 BL      sub_FFC476B0_my\n" // --> Chnaged
"                 B       loc_FFC47C9C\n"
" loc_FFC47C60:\n"
"                 LDR     R1, [R0,#0x10]\n"
"                 LDR     R0, [R0,#4]\n"
"                 BL      sub_FFD07B14\n"		// _sub_FFD07B14__AviWriter_c__0 
"                 B       loc_FFC47C9C\n"
" loc_FFC47C70:\n"
"                 LDR     R0, [R4,#0x38]\n"
"                 CMP     R0, #5\n"
"                 STRNE   R5, [R4,#0x28]\n"
"                 B       loc_FFC47C9C\n"
" loc_FFC47C80:\n"
"                 BL      sub_FFC474BC\n"		// _sub_FFC474BC__MovieRecorder_c__1000
"                 B       loc_FFC47C9C\n"
" loc_FFC47C88:\n"
"                 BL      sub_FFC47378\n"
"                 B       loc_FFC47C9C\n"
" loc_FFC47C90:\n"
"                 BL      sub_FFC471D4\n"		// _sub_FFC471D4__MovieRecorder_c__100
"                 B       loc_FFC47C9C\n"
" loc_FFC47C98:\n"
"                 BL      sub_FFC47E04\n"		// _sub_FFC47E04__MovieRecorder_c__100
" loc_FFC47C9C:\n"
"                 LDR     R1, [SP,#0x20-0x1C]\n"
"                 LDR     R3, =0xFFC47034\n"		// "MovieRecorder.c"
"                 STR     R6, [R1]\n"
"                 STR     R8, [SP,#0x20-0x20]\n"
"                 LDR     R0, [R4,#0x1C]\n"
"                 MOV     R2, R7\n"
"                 BL      sub_FFC0BCD8\n"
"                 B       loc_FFC47BCC\n"
);
}

void __attribute((naked,noinline)) sub_FFC476B0_my() {
     asm volatile (
"                 STMFD   SP!, {R4-R8,LR}\n"
"                 SUB     SP, SP, #0x40\n"
"                 MOV     R6, #0\n"
"                 LDR     R5, =0x5048\n"
"                 MOV     R4, R0\n"
"                 STR     R6, [SP,#0x58-0x28]\n"
"                 STR     R6, [SP,#0x58-0x30]\n"
"                 LDR     R0, [R5,#0x38]\n"
"                 MOV     R8, #4\n"
"                 CMP     R0, #3\n"
"                 STREQ   R8, [R5,#0x38]\n"
"                 LDR     R0, [R5,#0xA0]\n"

//"								BLX 		R0\n"			// !! Workaround !!
"									MOV 		LR, PC\n"			// gcc won't compile "BLX 	R0" nor "BL	R0".
"									MOV 		PC, R0\n"			// workaround: make your own "BL" and hope we don't need the change to thumb-mode

"                 LDR     R0, [R5,#0x38]\n"
"                 CMP     R0, #4\n"
"                 BNE     loc_FFC47788\n"
"                 ADD     R3, SP, #0x58-0x30\n"
"                 ADD     R2, SP, #0x58-0x30+4\n"
"                 ADD     R1, SP, #0x58-0x28\n"
"                 ADD     R0, SP, #0x58-0x24\n"
"                 BL      sub_FFD07CA8\n"
"                 CMP     R0, #0\n"
"                 MOV     R7, #1\n"
"                 BNE     loc_FFC4772C\n"
"                 LDR     R1, [R5,#0x28]\n"
"                 CMP     R1, #1\n"
"                 BNE     loc_FFC47790\n"
"                 LDR     R1, [R5,#0x50]\n"
"                 LDR     R2, [R5,#0x3C]\n"
"                 CMP     R1, R2\n"
"                 BCC     loc_FFC47790\n"
" loc_FFC4772C:\n"
"                 CMP     R0, #0x80000001\n"
"                 STREQ   R8, [R5,#0x54]\n"
"                 BEQ     loc_FFC47764\n"
"                 CMP     R0, #0x80000003\n"
"                 STREQ   R7, [R5,#0x54]\n"
"                 BEQ     loc_FFC47764\n"
"                 CMP     R0, #0x80000005\n"
"                 MOVEQ   R0, #2\n"
"                 BEQ     loc_FFC47760\n"
"                 CMP     R0, #0x80000007\n"
"                 STRNE   R6, [R5,#0x54]\n"
"                 BNE     loc_FFC47764\n"
"                 MOV     R0, #3\n"
" loc_FFC47760:\n"
"                 STR     R0, [R5,#0x54]\n"
" loc_FFC47764:\n"
"                 LDR     R0, =0x18968\n"
"                 LDR     R0, [R0,#8]\n"
"                 CMP     R0, #0\n"
"                 BEQ     loc_FFC4777C\n"
"                 BL      sub_FFC323F8\n"
"                 B       loc_FFC47780\n"
" loc_FFC4777C:\n"
"                 BL      sub_FFC471D4\n"		// _sub_FFC471D4__MovieRecorder_c__100
" loc_FFC47780:\n"
"                 MOV     R0, #5\n"
"                 STR     R0, [R5,#0x38]\n"
" loc_FFC47788:\n"
"                 ADD     SP, SP, #0x40\n"
"                 LDMFD   SP!, {R4-R8,PC}\n"
" loc_FFC47790:\n"
"                 LDR     LR, [SP,#0x58-0x28]\n"
"                 CMP     LR, #0\n"
"                 BEQ     loc_FFC47858\n"
"                 STR     R7, [R5,#0x2C]\n"
"                 LDR     R0, [R5,#0x6C]\n"
"                 LDR     R1, [R4,#0x14]\n"
"                 LDR     R2, [R4,#0x18]\n"
"                 LDR     R12, [R4,#0xC]\n"
"                 ADD     R3, SP, #0x58-0x20\n"
"                 ADD     R8, SP, #0x58-0x44\n"
"                 STMIA   R8, {R0-R3}\n"
"                 LDR     R3, [R5,#0x58]\n"
"                 ADD     R2, SP, #0x58-0x1C\n"
"                 ADD     R8, SP, #0x58-0x50\n"
//"               LDRD    R0, [SP,#0x58-0x30]\n"	// Workaround, selected processor does not support `ldrd R0,[SP,#0x58-0x30]'
"									.long   0xE1CD02D8\n"						// binary representation of instruction above
"                 STMIA   R8, {R0,R2,R3}\n"
"                 STR     R1, [SP,#0x58-0x54]\n"
"                 STR     LR, [SP,#0x58-0x58]\n"
"                 LDMIB   R4, {R0,R1}\n"
"                 LDR     R3, [SP,#0x58-0x24]\n"
"                 MOV     R2, R12\n"
"                 BL      sub_FFCCDF08\n"
"                 LDR     R0, [R5,#0x10]\n"
"                 MOV     R1, #0x3E8\n"
"                 BL      sub_FFC0B74C\n"		// eventproc_export_TakeSemaphore
"                 CMP     R0, #9\n"
"                 BNE     loc_FFC4780C\n"
"                 BL      sub_FFD08284\n"
"                 MOV     R0, #0x90000\n"
"                 STR     R7, [R5,#0x38]\n"
"                 B       loc_FFC47824\n"
" loc_FFC4780C:\n"
"                 LDR     R0, [SP,#0x58-0x20]\n"
"                 CMP     R0, #0\n"
"                 BEQ     loc_FFC4782C\n"
"                 BL      sub_FFD08284\n"
"                 MOV     R0, #0xA0000\n"
"                 STR     R7, [R5,#0x38]\n"
" loc_FFC47824:\n"
"                 BL      sub_FFC5CC4C\n"		// eventproc_export_HardwareDefect
"                 B       loc_FFC47788\n"
" loc_FFC4782C:\n"
"                 BL      sub_FFCCDFCC\n"
"                 LDR     R0, [SP,#0x58-0x24]\n"
"                 LDR     R1, [SP,#0x58-0x1C]\n"
"                 BL      sub_FFD0802C\n"		// _sub_FFD0802C__AviWriter_c__0
"                 LDR     R0, [R5,#0x4C]\n"
"                 LDR     R1, =0x50B4\n"
"                 ADD     R0, R0, #1\n"
"                 STR     R0, [R5,#0x4C]\n"
"                 LDR     R0, [SP,#0x58-0x1C]\n"
"                 MOV     R2, #0\n"
"                 BL      sub_FFD05EA4_my\n"	// --> Changed
" loc_FFC47858:\n"
"                 LDR     R0, [R5,#0x50]\n"
"                 ADD     R0, R0, #1\n"
"                 STR     R0, [R5,#0x50]\n"
"                 LDR     R1, [R5,#0x78]\n"
"                 MUL     R0, R1, R0\n"
"                 LDR     R1, [R5,#0x74]\n"
"                 BL      sub_FFE73C80\n"
"                 MOV     R4, R0\n"
"                 BL      sub_FFD082BC\n"
"                 LDR     R1, [R5,#0x70]\n"
"                 CMP     R1, R4\n"
"                 BNE     loc_FFC47894\n"
"                 LDR     R0, [R5,#0x30]\n"
"                 CMP     R0, #1\n"
"                 BNE     loc_FFC478A8\n"
" loc_FFC47894:\n"
"                 LDR     R1, [R5,#0x84]\n"
"                 MOV     R0, R4\n"

//"       				BLX     R1\n"
"									.long   0xE12FFF31\n"

"                 STR     R4, [R5,#0x70]\n"
"                 STR     R6, [R5,#0x30]\n"
" loc_FFC478A8:\n"
"                 STR     R6, [R5,#0x2C]\n"
"                 B       loc_FFC47788\n"
);
}


void __attribute((naked,noinline)) sub_FFD05EA4_my() {
     asm volatile (
"                 STMFD   SP!, {R4-R8,LR}\n"
"                 LDR     R4, =0x8090\n"
"                 LDR     LR, [R4]\n"
"                 LDR     R2, [R4,#8]\n"
"                 CMP     LR, #0\n"
"                 LDRNE   R3, [R4,#0xC]\n"
"                 MOV     R5, R2\n"
"                 CMPNE   R3, #1\n"
"                 MOVEQ   R2, #0\n"
"                 STREQ   R0, [R4]\n"
"                 STREQ   R2, [R4,#0xC]\n"
"                 BEQ     loc_FFD05F70\n"
"                 LDR     R3, [R4,#4]\n"
"                 LDR     R7, =table\n"					// --> changed
"                 ADD     R12, R3, R3,LSL#1\n"
"                 LDR     R3, [R7,R12,LSL#2]\n"
"                 ADD     R6, R7, #0x30\n"
"                 LDR     R8, [R6,R12,LSL#2]\n"
"                 SUB     R3, LR, R3\n"
"                 CMP     R3, #0\n"
"                 SUB     LR, LR, R8\n"
"                 BLE     loc_FFD05F2C\n"
"                 ADD     R12, R7, R12,LSL#2\n"
"                 LDR     LR, [R12,#4]\n"
"                 CMP     LR, R3\n"
"                 ADDGE   R2, R2, #1\n"
"                 BGE     loc_FFD05F20\n"
"                 LDR     R12, [R12,#8]\n"
"                 CMP     R12, R3\n"
"                 ADDLT   R2, R2, #3\n"
"                 ADDGE   R2, R2, #2\n"
" loc_FFD05F20:\n"
//"                 CMP     R2, #0x17\n"
//"                 MOVGE   R2, #0x16\n"
"									CMP     R2, #0x1A\n"   // ---------> changed
"									MOVGE   R2, #0x19\n"   // ---------> changed
"                 B       loc_FFD05F60\n"
" loc_FFD05F2C:\n"
"                 CMP     LR, #0\n"
"                 BGE     loc_FFD05F60\n"
"                 ADD     R3, R6, R12,LSL#2\n"
"                 LDR     R12, [R3,#4]\n"
"                 CMP     R12, LR\n"
"                 SUBLE   R2, R2, #1\n"
"                 BLE     loc_FFD05F58\n"
"                 LDR     R3, [R3,#8]\n"
"                 CMP     R3, LR\n"
"                 SUBGT   R2, R2, #3\n"
"                 SUBLE   R2, R2, #2\n"
" loc_FFD05F58:\n"
"                 CMP     R2, #0\n"
"                 MOVLT   R2, #0\n"
" loc_FFD05F60:\n"
"                 CMP     R2, R5\n"
"                 STRNE   R2, [R4,#8]\n"
"                 MOVNE   R2, #1\n"
"                 STRNE   R2, [R4,#0xC]\n"
" loc_FFD05F70:\n"
"                 LDR     R2, =CompressionRateTable\n"
"                 LDR     R3, [R4,#8]\n"
"                 LDR     R2, [R2,R3,LSL#2]\n"
"                 LDR     R3, =video_mode\n"      // +
"                 LDR     R3, [R3]\n"             // +
"                 LDR     R3, [R3]\n"             // +
"                 CMP     R3, #1\n"               // +
"                 LDREQ   R3, =video_quality\n"   // +     
"                 LDREQ   R3, [R3]\n"             // +     
"                 LDREQ   R2, [R3]\n"             // +     
"                 STR     R2, [R1]\n"
"                 STR     R0, [R4]\n"
"                 BL      mute_on_zoom\n"     // +
"                 LDMFD   SP!, {R4-R8,PC}\n"
);
}
